Bridging the Sim-to-Real Gap in Semiconductor Visual Program Synthesis via Input Binarization

Researchers propose a visual program synthesis framework using Vision-Language Models to convert semiconductor inspection images into editable code, addressing the costly challenge of obtaining real training data for circuit metrology. By applying input binarization to strip texture noise from real Scanning Electron Microscope images, the approach bridges the gap between synthetic training data and real-world application, improving geometric accuracy detection by 19.6%.

This research addresses a critical bottleneck in semiconductor manufacturing: the high cost and complexity of generating sufficient training data for automated circuit inspection systems. The proposed framework leverages Vision-Language Models to translate inspection images into Domain-Specific Language code, enabling precise parametric control over circuit geometry—a requirement that traditional generative models like GANs and diffusion models cannot reliably guarantee at nanometer scales. The innovation lies not in the VLM itself but in recognizing that binarization of input images substantially mitigates sim-to-real domain adaptation challenges.

The semiconductor inspection industry has long struggled with the accuracy-cost tradeoff. Generating labeled datasets at scale requires expensive manual annotation by domain experts, while synthetic data from simulations introduces geometric inaccuracies incompatible with metrology standards. This research demonstrates that simple preprocessing—removing texture and noise through binarization—allows models trained exclusively on synthetic data to perform effectively on real SEM imagery without expensive retraining or domain adaptation techniques.

The practical impact for semiconductor manufacturers is significant. By enabling controlled generation of training data with exact parameter manipulation, this approach reduces dependency on costly real-world data collection while maintaining the geometric precision essential for quality control. The 19.6% improvement in Dice coefficient on the MIIC dataset suggests meaningful gains in inspection accuracy. This methodology could accelerate adoption of automated inspection systems across foundries of varying scales and reduce time-to-production for new process nodes where historical datasets are unavailable.

• →Vision-Language Models can convert semiconductor inspection images into editable parametric code, enabling controlled synthetic training data generation with nanometer-scale accuracy.
• →Input binarization bridges the sim-to-real gap by stripping SEM-specific texture and noise, improving mean Dice coefficient from 0.4393 to 0.5256.
• →The approach reduces reliance on expensive real-world labeled datasets while maintaining the geometric precision required for semiconductor metrology tasks.
• →This methodology addresses a critical bottleneck in semiconductor manufacturing where traditional generative models cannot guarantee required inspection accuracy.
• →The framework has immediate practical applications for foundries implementing automated inspection systems across varying process nodes.