Joint Hardware-Workload Co-Optimization for In-Memory Computing Accelerators

Researchers developed a joint hardware-workload co-optimization framework for in-memory computing accelerators that can efficiently support multiple neural network workloads rather than just single specialized models. The framework achieved significant energy-delay-area product reductions of up to 76.2% and 95.5% compared to baseline methods when optimizing across multiple workloads.

• →Most existing optimization frameworks target single workloads, creating specialized hardware that doesn't generalize well across applications.
• →The new framework uses evolutionary algorithms to design generalized IMC accelerator architectures that work across multiple neural network workloads.
• →Testing on both RRAM and SRAM-based IMC architectures showed strong robustness and adaptability across diverse design scenarios.
• →Energy-delay-area product improvements reached 76.2% for 4 workloads and 95.5% for 9 workloads compared to baseline methods.
• →The framework's source code is publicly available on GitHub for further research and development.